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SSL acceleration is a method of offloading the processor-intensive public-key encryption algorithms involved in SSL transactions to a hardware accelerator. Typically this means having a separate card that plugs into a PCI slot in a computer that contains one or more co-processors able to handle much of the SSL processing. SSL accelerators may use off the shelf CPUs, but most use custom ASICs and RISC chips to do most of the difficult computational work. == How it works == The most computationally expensive part of an SSL session is the SSL handshake, where the SSL server (usually an SSL webserver) and the SSL client (usually a web browser) agree on a number of parameters that establish the security of the connection. Part of the role of the SSL handshake is to agree on session keys (symmetric keys, used for the duration of a given session), but the encryption and signature of the SSL handshake messages itself is done using asymmetric keys (contained in the certificates), which requires more computational power than the symmetric cryptography used for the encryption/decryption of the session data. Typically a hardware SSL accelerator will offload processing of the SSL handshake while leaving it to the server software to process the less intense symmetric cryptography of the actual SSL data exchange, but some accelerators handle all SSL operations and terminate the SSL connection, thus leaving the server seeing only unencrypted connections. 抄文引用元・出典: フリー百科事典『 ウィキペディア（Wikipedia）』 ■ウィキペディアで「SSL acceleration」の詳細全文を読む スポンサード リンク
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